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- Placement_(EDA) abstract "Placement is an essential step in electronic design automation - the portion of the physical design flow that assigns exact locations for various circuitcomponents within the chip’s core area. An inferior placement assignment will not only affect thechip's performance but might also make it nonmanufacturable by producing excessive wirelength, whichis beyond available routing resources. Consequently, a placer must perform the assignment while optimizinga number of objectives to ensure that a circuit meets its performance demands. Typical placementobjectives include Total wirelength: Minimizing the total wirelength, or the sum of the length of all the wires in the design, is the primary objective of most existing placers. This not only helps minimize chip size, and hence cost, but also minimizes power and delay, which are proportional to the wirelength (This assumes long wires have additional buffering inserted; all modern design flows do this.)Timing: The clock cycle of a chip is determined by the delay of its longest path, usually referred to as the critical path. Given a performance specification, a placer must ensure that no path exists with delay exceeding the maximum specified delay.Congestion: While it is necessary to minimize the total wirelength to meet the total routing resources, it is also necessary to meet the routing resources within various local regions of the chip’s core area. A congested region might lead to excessive routing detours, or make it impossible to complete all routes.Power: Power minimization typically involves distributing the locations of cell components so as to reduce the overall power consumption, alleviate hot spots, and smooth temperature gradients.A secondary objective is placement runtime minimization.".
- Placement_(EDA) wikiPageExternalLink 322B_P.06.pdf.
- Placement_(EDA) wikiPageID "3473557".
- Placement_(EDA) wikiPageRevisionID "592804060".
- Placement_(EDA) hasPhotoCollection Placement_(EDA).
- Placement_(EDA) subject Category:Electronic_design_automation.
- Placement_(EDA) subject Category:Electronics_optimization.
- Placement_(EDA) subject Category:Integrated_circuits.
- Placement_(EDA) type Artifact100021939.
- Placement_(EDA) type Circuit103033362.
- Placement_(EDA) type ComputerCircuit103084420.
- Placement_(EDA) type Device103183080.
- Placement_(EDA) type ElectricalDevice103269401.
- Placement_(EDA) type Instrumentality103575240.
- Placement_(EDA) type IntegratedCircuit103577090.
- Placement_(EDA) type IntegratedCircuits.
- Placement_(EDA) type Object100002684.
- Placement_(EDA) type PhysicalEntity100001930.
- Placement_(EDA) type Whole100003553.
- Placement_(EDA) comment "Placement is an essential step in electronic design automation - the portion of the physical design flow that assigns exact locations for various circuitcomponents within the chip’s core area. An inferior placement assignment will not only affect thechip's performance but might also make it nonmanufacturable by producing excessive wirelength, whichis beyond available routing resources.".
- Placement_(EDA) label "Leiterplattenentflechtung".
- Placement_(EDA) label "Placement (EDA)".
- Placement_(EDA) label "布局 (集成电路)".
- Placement_(EDA) sameAs Leiterplattenentflechtung.
- Placement_(EDA) sameAs m.09fd49.
- Placement_(EDA) sameAs Q1484784.
- Placement_(EDA) sameAs Q1484784.
- Placement_(EDA) sameAs Placement_(EDA).
- Placement_(EDA) wasDerivedFrom Placement_(EDA)?oldid=592804060.
- Placement_(EDA) isPrimaryTopicOf Placement_(EDA).