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- XCore_XS1-L1 abstract "The XS1-L1 is a 32-bit processor designed by XMOS, featuring support for up to 8 concurrent threads. It was available as of June 2009 running at 400 MHz. As of April 2010 500 MHz versions are available. Each thread can run at up to 125 MHz; four threads follow each other through the pipeline, resulting in a top speed of 500 MIPS if at least four threads are active. The 500 MIPS of each core is equally distributed over all active threads. This allows the use of extra threads in order to hide latency.".
- XCore_XS1-L1 thumbnail XCore_XS1-L1_48QFP.png?width=300.
- XCore_XS1-L1 wikiPageExternalLink XM-000324-RF-1.pdf.
- XCore_XS1-L1 wikiPageID "23361937".
- XCore_XS1-L1 wikiPageRevisionID "582761920".
- XCore_XS1-L1 arch XCore_XS1.
- XCore_XS1-L1 caption "An XMOS Xcore-L processor, 48 TQFP package, 7x7 mm.".
- XCore_XS1-L1 fastUnit "MHz".
- XCore_XS1-L1 fastest "500".
- XCore_XS1-L1 hasPhotoCollection XCore_XS1-L1.
- XCore_XS1-L1 name "XS1-L".
- XCore_XS1-L1 numcores "1".
- XCore_XS1-L1 pack "124".
- XCore_XS1-L1 pack "128".
- XCore_XS1-L1 pack "48".
- XCore_XS1-L1 pack "64".
- XCore_XS1-L1 producedStart "2009".
- XCore_XS1-L1 slowUnit "MHz".
- XCore_XS1-L1 subject Category:Digital_signal_processors.
- XCore_XS1-L1 subject Category:Parallel_computing.
- XCore_XS1-L1 comment "The XS1-L1 is a 32-bit processor designed by XMOS, featuring support for up to 8 concurrent threads. It was available as of June 2009 running at 400 MHz. As of April 2010 500 MHz versions are available. Each thread can run at up to 125 MHz; four threads follow each other through the pipeline, resulting in a top speed of 500 MIPS if at least four threads are active. The 500 MIPS of each core is equally distributed over all active threads.".
- XCore_XS1-L1 label "XCore XS1-L1".
- XCore_XS1-L1 sameAs m.06w82b_.
- XCore_XS1-L1 sameAs Q17145540.
- XCore_XS1-L1 sameAs Q17145540.
- XCore_XS1-L1 wasDerivedFrom XCore_XS1-L1?oldid=582761920.
- XCore_XS1-L1 depiction XCore_XS1-L1_48QFP.png.
- XCore_XS1-L1 isPrimaryTopicOf XCore_XS1-L1.