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- 01GJDHT4RDE53NFJWBW44DWPKV classification A1.
- 01GJDHT4RDE53NFJWBW44DWPKV date "2022".
- 01GJDHT4RDE53NFJWBW44DWPKV language "eng".
- 01GJDHT4RDE53NFJWBW44DWPKV type journalArticle.
- 01GJDHT4RDE53NFJWBW44DWPKV hasPart 01GJDHX4M4PNACBC5V85M5ZQKA.pdf.
- 01GJDHT4RDE53NFJWBW44DWPKV subject "Technology and Engineering".
- 01GJDHT4RDE53NFJWBW44DWPKV doi "10.3390/s22166069".
- 01GJDHT4RDE53NFJWBW44DWPKV issn "1424-8220".
- 01GJDHT4RDE53NFJWBW44DWPKV issue "16".
- 01GJDHT4RDE53NFJWBW44DWPKV volume "22".
- 01GJDHT4RDE53NFJWBW44DWPKV abstract "In this paper, a Hall plate readout with a randomized four-phase spinning-current scheme is proposed. The goal is to remove the maximum number of offset components, including the offset associated with spike demodulation. The outcome is that only the smallest possible offset remains, corresponding to the residual offset of the Hall plate which cannot be distinguished from the Hall signal. An additional innovation is to operate various offset-reduction loops in spread-spectrum mode, allowing the removal of error components without notching out any in-band signals. The resulting approach delivers a very large notch-free bandwidth while simultaneously reducing the Hall plate residual offset, making it an enabler for high-bandwidth Hall-based current sensors. To demonstrate the proposed techniques, we have realized a mixed-mode experimental circuit, where the analog part is implemented in a custom integrated circuit, and the digital control system in an FPGA is connected to the analog chip. Measurement results feature a Hall readout system with a notch-free bandwidth up to 820 kHz and a 47 mu Trms noise floor. The input-referred Hall plate offset, based on statistical measurements on 10 samples from a single wafer, is reduced from 130 +/- 22 mu T to only 23 +/- 22 mu T.".
- 01GJDHT4RDE53NFJWBW44DWPKV author D65A3A04-F0EE-11E1-A197-91C894A0A6B4.
- 01GJDHT4RDE53NFJWBW44DWPKV author F4C98A72-F0ED-11E1-A9DE-61C894A0A6B4.
- 01GJDHT4RDE53NFJWBW44DWPKV author F4D05B04-F0ED-11E1-A9DE-61C894A0A6B4.
- 01GJDHT4RDE53NFJWBW44DWPKV dateCreated "2022-11-21T16:54:44Z".
- 01GJDHT4RDE53NFJWBW44DWPKV dateModified "2024-10-29T08:51:15Z".
- 01GJDHT4RDE53NFJWBW44DWPKV name "A 2 MS/s full bandwidth hall system with low offset enabled by randomized spinning".
- 01GJDHT4RDE53NFJWBW44DWPKV pagination urn:uuid:3a457cc4-6faa-4ebb-840c-774839d734e2.
- 01GJDHT4RDE53NFJWBW44DWPKV sameAs LU-01GJDHT4RDE53NFJWBW44DWPKV.
- 01GJDHT4RDE53NFJWBW44DWPKV sourceOrganization urn:uuid:1b20f995-2eb6-41b8-9363-98c9af473b1c.
- 01GJDHT4RDE53NFJWBW44DWPKV type A1.