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- aggregation classification "C1".
- aggregation creator person.
- aggregation creator person.
- aggregation creator person.
- aggregation creator person.
- aggregation date "2010".
- aggregation format "application/pdf".
- aggregation hasFormat 1067219.bibtex.
- aggregation hasFormat 1067219.csv.
- aggregation hasFormat 1067219.dc.
- aggregation hasFormat 1067219.didl.
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- aggregation isPartOf urn:isbn:9780769541716.
- aggregation language "eng".
- aggregation publisher "IEEE Computer Society".
- aggregation rights "I have transferred the copyright for this publication to the publisher".
- aggregation subject "Technology and Engineering".
- aggregation title "A parallel for loop memory template for a high level synthesis compiler".
- aggregation abstract "We propose a parametrized memory template for applications with parallel 'for' loops. The template's parameters reflect important trade-offs made during system design. The template is incorporated in our high level synthesis (HLS) compiler, where the template's parameters are adjusted to the application. The template fits parallel 'for' loops with no loop dependencies and sequential bodies. We found two alternative template implementations using our compiler. In the future, we will develop templates for other types of 'for' loops. These will be added to the compiler and it will identify the template that works best for the application it is compiling. Once a template is selected, the compiler will use design space exploration to select the best combination of template parameters for the targeted hardware and application.".
- aggregation authorList BK184227.
- aggregation endPage "455".
- aggregation startPage "449".
- aggregation aggregates 1067423.
- aggregation isDescribedBy 1067219.
- aggregation similarTo DSD.2010.62.
- aggregation similarTo LU-1067219.