Matches in UGent Biblio for { <https://biblio.ugent.be/publication/1105031#aggregation> ?p ?o. }
Showing items 1 to 34 of
34
with 100 items per page.
- aggregation classification "C1".
- aggregation creator person.
- aggregation creator person.
- aggregation creator person.
- aggregation date "2010".
- aggregation format "application/pdf".
- aggregation hasFormat 1105031.bibtex.
- aggregation hasFormat 1105031.csv.
- aggregation hasFormat 1105031.dc.
- aggregation hasFormat 1105031.didl.
- aggregation hasFormat 1105031.doc.
- aggregation hasFormat 1105031.json.
- aggregation hasFormat 1105031.mets.
- aggregation hasFormat 1105031.mods.
- aggregation hasFormat 1105031.rdf.
- aggregation hasFormat 1105031.ris.
- aggregation hasFormat 1105031.txt.
- aggregation hasFormat 1105031.xls.
- aggregation hasFormat 1105031.yaml.
- aggregation isPartOf urn:isbn:9780769543147.
- aggregation isPartOf urn:isbn:9781424495238.
- aggregation language "eng".
- aggregation publisher "IEEE Computer Society".
- aggregation rights "I have transferred the copyright for this publication to the publisher".
- aggregation subject "Technology and Engineering".
- aggregation title "Run-time reconfiguration for automatic hardware/software partitioning".
- aggregation abstract "Parameterisable configurations allow very fast run-time reconfiguration in FPGAs. The main advantage of this new concept is the automated tool flow that converts a hardware design into a more resource-efficient run-time reconfigurable design without a large design effort. In this paper, we show that the automated tool flow for run-time reconfiguration can be used to easily optimize a full hardware implementation for area by converting it automatically to a hardware/software implementation. This tool flow can partition the design in a very short time and, at the same time, result in significant area gains. The usage of run time reconfiguration allows us to extend the hardware/software boundary so more functionality can be moved to software. We will explain the core principles behind the run-time reconfiguration technique using the AES encoder as an example. For the AES encoder the manual hardware/software partitioning is clear. This manual partitioning will serve as a comparison to the automated partitioning that uses parameterisable configurations. Several possible AES encoder implementations are compared. Our automatically partitioned AES design shows a 20.6 % area gain compared to an unoptimized hardware implementation and a 5.3 % gain compared to a manually optimized 3rd party hardware implementation. In addition, we discuss the results of our technique on other applications, where the hardware/software partitioning is less clear. Among these, a TripleDES implementation shows a 29.3 % area gain using our technique. Based on our AES encoder results, we derive some guidelines for optimizing the impact of parameterisable configurations in general designs.".
- aggregation authorList BK274638.
- aggregation endPage "429".
- aggregation startPage "424".
- aggregation aggregates 1148368.
- aggregation isDescribedBy 1105031.
- aggregation similarTo ReConFig.2010.57.
- aggregation similarTo LU-1105031.