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- aggregation classification "C1".
- aggregation creator person.
- aggregation creator person.
- aggregation creator person.
- aggregation date "2012".
- aggregation format "application/pdf".
- aggregation hasFormat 2914001.bibtex.
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- aggregation hasFormat 2914001.doc.
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- aggregation isPartOf urn:isbn:9781467322553.
- aggregation language "eng".
- aggregation publisher "IEEE".
- aggregation rights "I have transferred the copyright for this publication to the publisher".
- aggregation subject "Technology and Engineering".
- aggregation title "Mapping logic to reconfigurable FPGA routing".
- aggregation abstract "Parameterised configurations for FPGAs are configuration bitstreams of which part of the bits are defined as Boolean functions of parameters. By evaluating these Boolean functions using different parameter values, it is possible to quickly and efficiently derive specialised configuration bitstreams with different properties. An important application of parameterised configurations is the generation of specialised configuration bitstreams for Dynamic Circuit Specialisation. Generating and using parameterised configurations requires a new FPGA tool flow. In this paper we present an algorithm for technology mapping of parameterised designs that can exploit the reconfigurability of the logic blocks and routing of the FPGA. This algorithm, called TCONMAP, is based on “Cut enumeration, cut ranking, node selection”. As part of it, a new method to calculate the feasibility of cuts based on the Binary Decision Diagrams (BDD) of their local function is proposed.".
- aggregation authorList BK325215.
- aggregation endPage "321".
- aggregation startPage "315".
- aggregation aggregates 2914015.
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- aggregation similarTo FPL.2012.6339224.
- aggregation similarTo LU-2914001.