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- Machine_Check_Architecture abstract "In computing, Machine Check Architecture (MCA) is an Intel mechanism in which the CPU reports hardware errors to the operating system.Intel's Pentium 4, Intel Xeon, P6 family processors as well as the Itanium architecture implement a machine check architecture that provides a mechanism for detecting and reporting hardware (machine) errors, such as: system bus errors, ECC errors, parity errors, cache errors, and translation lookaside buffer errors. It consists of a set of model-specific registers (MSRs) that are used to set up machine checking and additional banks of MSRs used for recording errors that are detected.".
- Machine_Check_Architecture wikiPageExternalLink architectures-software-developer-manuals.html.
- Machine_Check_Architecture wikiPageExternalLink www.mcelog.org.
- Machine_Check_Architecture wikiPageExternalLink MCAsupport.mspx.
- Machine_Check_Architecture wikiPageID "14655528".
- Machine_Check_Architecture wikiPageRevisionID "595942049".
- Machine_Check_Architecture subject Category:Computer_architecture.
- Machine_Check_Architecture comment "In computing, Machine Check Architecture (MCA) is an Intel mechanism in which the CPU reports hardware errors to the operating system.Intel's Pentium 4, Intel Xeon, P6 family processors as well as the Itanium architecture implement a machine check architecture that provides a mechanism for detecting and reporting hardware (machine) errors, such as: system bus errors, ECC errors, parity errors, cache errors, and translation lookaside buffer errors.".
- Machine_Check_Architecture label "Machine Check Architecture".
- Machine_Check_Architecture sameAs m.03gr_l6.
- Machine_Check_Architecture sameAs Q6723705.
- Machine_Check_Architecture sameAs Q6723705.
- Machine_Check_Architecture wasDerivedFrom Machine_Check_Architecture?oldid=595942049.
- Machine_Check_Architecture isPrimaryTopicOf Machine_Check_Architecture.