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- Memory_bus abstract "The memory bus is the computer bus which connects the main memory to the memory controller in computer systems. Originally, general-purpose buses like VMEbus and the S-100 bus were used, but to reduce latency, modern memory buses are designed to connect directly to DRAM chips, and thus are designed by chip standards bodies such as JEDEC. Examples are the various generations of SDRAM, and serial point-to-point buses like SLDRAM and RDRAM. An exception is the Fully Buffered DIMM which, despite being carefully designed to minimize the effect, has been criticized for its higher latency.".
- Memory_bus wikiPageID "2224533".
- Memory_bus wikiPageRevisionID "544062228".
- Memory_bus auto "yes".
- Memory_bus date "December 2009".
- Memory_bus hasPhotoCollection Memory_bus.
- Memory_bus subject Category:Computer_buses.
- Memory_bus subject Category:Motherboard.
- Memory_bus type Abstraction100002137.
- Memory_bus type Arrangement105726596.
- Memory_bus type BusTopology105730591.
- Memory_bus type Cognition100023271.
- Memory_bus type ComputerBuses.
- Memory_bus type Configuration105731779.
- Memory_bus type Design105728678.
- Memory_bus type PsychologicalFeature100023100.
- Memory_bus type Structure105726345.
- Memory_bus type Topology105730365.
- Memory_bus comment "The memory bus is the computer bus which connects the main memory to the memory controller in computer systems. Originally, general-purpose buses like VMEbus and the S-100 bus were used, but to reduce latency, modern memory buses are designed to connect directly to DRAM chips, and thus are designed by chip standards bodies such as JEDEC. Examples are the various generations of SDRAM, and serial point-to-point buses like SLDRAM and RDRAM.".
- Memory_bus label "Memory bus".
- Memory_bus label "ناقل الذاكرة".
- Memory_bus sameAs m.052570r.
- Memory_bus sameAs Q6815706.
- Memory_bus sameAs Q6815706.
- Memory_bus sameAs Memory_bus.
- Memory_bus wasDerivedFrom Memory_bus?oldid=544062228.
- Memory_bus isPrimaryTopicOf Memory_bus.