Matches in Harvard for { <http://id.lib.harvard.edu/aleph/003330864/catalog> ?p ?o. }
Showing items 1 to 32 of
32
with 100 items per page.
- catalog alternative "Very large scale integration algorithms and architectures. Fundamentals.".
- catalog contributor b4835676.
- catalog created "1993.".
- catalog date "1993".
- catalog date "1993.".
- catalog dateCopyrighted "1993.".
- catalog description "Computer technology and architecture : an evolving interaction / J. L. Hennessy and N. P. Jouppi -- Concurrent VLSI architectures / C. L. Seitz -- On the design of algorithms for VLSI systolic arrays / D. I. Moldovan -- Algorithms for VLSI processor arrays / H. T. Kung and C. E. Leiserson -- Systolic arrays-- from concept to implementation / J. A. B. Fortes and B. W. Wah -- Why systolic archiectures? / H. T. Kung -- Wavefront array processors-- concept to implementation / S. Y. Kung ... [et al.] -- The design of optimal systolic arrays / G.- J. Li and B. W. Wah -- A high speed systolic architecture for labeling connected components in an image / N. Ranganathan, R. Mehrotra, and S. Subramaniam -- Systolic priority queues / C. E. Leiserson -- Systolic stacks, queues, and counters / L. J. Guibas and F. M. Liang -- The VLSI complexity of sorting / C. D. Thompson -- Parallel sorting in two-dimensional VLSI models of computation /".
- catalog description "I. D. Scherson and S. Sen -- Matrix computations on systolic-type meshes : an introduction to the multimesh graph method / J. H. Moreno and T. Lang -- Highly concurrent computing structures for matrix arithmetic and signal processing / H. M. Ahmed, J.- M. Delosme, and M. Morf -- Systolic evaluation of polynomial expressions / P. C. Mathias and L. M. Patnaik -- The design of special-purpose VLSI chips / M. J. Foster and H. T. Kung -- A VLSI systolic array processor chip for computing joins in a relational database / N. Ranganathan, K. R. Balaji, and H. N. Srinidhi -- Hardware algorithms for determining similarity between two strings / A. Mukherjee -- The tree-match chip / D. R. Smith and J. C. Lin -- Design of a massively parallel processor / K. E. Batcher -- PUMPS architecture for pattern analysis and image database management / F. A. Briggs ... [et al.] -- The Warp computer : architecture, implementation, and performance /".
- catalog description "Includes bibliographical references.".
- catalog description "M. Annaratone ... [et al.] -- Intel's secret is out / T. S. Perry.".
- catalog extent "ix, 305 p. :".
- catalog hasFormat "VLSI algorithms and architectures. Fundamentals.".
- catalog identifier "0818643900 (pbk.)".
- catalog identifier "0818643919 (microfiche)".
- catalog identifier "0818643927".
- catalog isFormatOf "VLSI algorithms and architectures. Fundamentals.".
- catalog issued "1993".
- catalog issued "1993.".
- catalog language "eng".
- catalog publisher "Los Alamitos, CA : IEEE Computer Society,".
- catalog relation "VLSI algorithms and architectures. Fundamentals.".
- catalog subject "621.39/5 20".
- catalog subject "Computer algorithms.".
- catalog subject "Computer architecture.".
- catalog subject "Integrated circuits Very large scale integration Design and construction.".
- catalog subject "TK7874 .V5554 1993".
- catalog tableOfContents "Computer technology and architecture : an evolving interaction / J. L. Hennessy and N. P. Jouppi -- Concurrent VLSI architectures / C. L. Seitz -- On the design of algorithms for VLSI systolic arrays / D. I. Moldovan -- Algorithms for VLSI processor arrays / H. T. Kung and C. E. Leiserson -- Systolic arrays-- from concept to implementation / J. A. B. Fortes and B. W. Wah -- Why systolic archiectures? / H. T. Kung -- Wavefront array processors-- concept to implementation / S. Y. Kung ... [et al.] -- The design of optimal systolic arrays / G.- J. Li and B. W. Wah -- A high speed systolic architecture for labeling connected components in an image / N. Ranganathan, R. Mehrotra, and S. Subramaniam -- Systolic priority queues / C. E. Leiserson -- Systolic stacks, queues, and counters / L. J. Guibas and F. M. Liang -- The VLSI complexity of sorting / C. D. Thompson -- Parallel sorting in two-dimensional VLSI models of computation /".
- catalog tableOfContents "I. D. Scherson and S. Sen -- Matrix computations on systolic-type meshes : an introduction to the multimesh graph method / J. H. Moreno and T. Lang -- Highly concurrent computing structures for matrix arithmetic and signal processing / H. M. Ahmed, J.- M. Delosme, and M. Morf -- Systolic evaluation of polynomial expressions / P. C. Mathias and L. M. Patnaik -- The design of special-purpose VLSI chips / M. J. Foster and H. T. Kung -- A VLSI systolic array processor chip for computing joins in a relational database / N. Ranganathan, K. R. Balaji, and H. N. Srinidhi -- Hardware algorithms for determining similarity between two strings / A. Mukherjee -- The tree-match chip / D. R. Smith and J. C. Lin -- Design of a massively parallel processor / K. E. Batcher -- PUMPS architecture for pattern analysis and image database management / F. A. Briggs ... [et al.] -- The Warp computer : architecture, implementation, and performance /".
- catalog tableOfContents "M. Annaratone ... [et al.] -- Intel's secret is out / T. S. Perry.".
- catalog title "VLSI algorithms and architectures. Fundamentals / [edited by] N. Ranganathan.".
- catalog title "Very large scale integration algorithms and architectures. Fundamentals.".
- catalog type "text".