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• catalog abstract "K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together. Digital Systems Design with VHDL and Synthesis focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs.".
• catalog contributor b11692778.
• catalog created "1999.".
• catalog date "1999".
• catalog date "1999.".
• catalog dateCopyrighted "1999.".
• catalog description "Includes bibliographical references and index.".
• catalog description "Integrated Design Process and Methodology -- VHDL and Digital Circuit Primitives -- Flip Flop -- Latch -- Three-State Buffer -- Combinational Gates -- VHDL Synthesis Rules -- Pads -- VHDL Simulation and Synthesis Environment and Design Process -- Synopsys VHDL Simulation Environment Overview -- Mentor Quick VHDL Simulation Environment -- Synthesis Environment -- Synthesis Technology Library -- VHDL Design Process for a Block -- Basic Combinational Circuits -- Selector -- Encoder -- Code Converter -- Equality Checker -- Comparator with Single Output -- Comparator with Multiple Outputs -- Basic Binary Arithmetic Circuits -- Half Adder and Full Adder -- Carry Ripple Adder -- Carry Look Ahead Adder -- Countone Circuit -- Leading Zero Circuit -- Barrel Shifter -- Basic Sequential Circuits -- Signal Manipulator -- Counter -- Shift Register -- Parallel to Serial Converter -- Serial to Parallel Converter -- Registers -- General Framework for Designing Registers -- Interrupt Registers -- DMA and Control Registers -- Configuration Registers -- Reading Registers -- Register Block Partitioning and Synthesis -- Testing Registers -- Microprocessor Registers -- Clock and Reset Circuits -- Clock Buffer and Clock Tree -- Clock Tree Generation -- Reset Circuitry -- Clock Skew and Fixes -- Synchronization between Clock Domains -- Clock Divider -- Gated Clock -- Dual-Port RAM, FIFO, and Dram Modeling -- Dual-Port RAM -- Synchronous FIFO -- Asynchronous FIFO -- Dynamic Random Access Memory (DRAM).".
• catalog description "K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together. Digital Systems Design with VHDL and Synthesis focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs.".
• catalog extent "xv, 499 p. :".
• catalog identifier "0769500234".
• catalog issued "1999".
• catalog issued "1999.".
• catalog language "eng".
• catalog publisher "Los Alamitos, Calif. : IEEE Computer Society,".
• catalog subject "621.39/2 21".
• catalog subject "Electronic digital computers Circuits Computer-aided design.".
• catalog subject "System design Data processing.".
• catalog subject "TK7888.4 .C435 1999".
• catalog subject "VHDL (Computer hardware description language)".
• catalog tableOfContents "Integrated Design Process and Methodology -- VHDL and Digital Circuit Primitives -- Flip Flop -- Latch -- Three-State Buffer -- Combinational Gates -- VHDL Synthesis Rules -- Pads -- VHDL Simulation and Synthesis Environment and Design Process -- Synopsys VHDL Simulation Environment Overview -- Mentor Quick VHDL Simulation Environment -- Synthesis Environment -- Synthesis Technology Library -- VHDL Design Process for a Block -- Basic Combinational Circuits -- Selector -- Encoder -- Code Converter -- Equality Checker -- Comparator with Single Output -- Comparator with Multiple Outputs -- Basic Binary Arithmetic Circuits -- Half Adder and Full Adder -- Carry Ripple Adder -- Carry Look Ahead Adder -- Countone Circuit -- Leading Zero Circuit -- Barrel Shifter -- Basic Sequential Circuits -- Signal Manipulator -- Counter -- Shift Register -- Parallel to Serial Converter -- Serial to Parallel Converter -- Registers -- General Framework for Designing Registers -- Interrupt Registers -- DMA and Control Registers -- Configuration Registers -- Reading Registers -- Register Block Partitioning and Synthesis -- Testing Registers -- Microprocessor Registers -- Clock and Reset Circuits -- Clock Buffer and Clock Tree -- Clock Tree Generation -- Reset Circuitry -- Clock Skew and Fixes -- Synchronization between Clock Domains -- Clock Divider -- Gated Clock -- Dual-Port RAM, FIFO, and Dram Modeling -- Dual-Port RAM -- Synchronous FIFO -- Asynchronous FIFO -- Dynamic Random Access Memory (DRAM).".
• catalog title "Digital systems design with VHDL and synthesis : an integrated approach / K.C. Chang.".
• catalog type "text".