Matches in Harvard for { <http://id.lib.harvard.edu/aleph/008872347/catalog> ?p ?o. }
Showing items 1 to 32 of
32
with 100 items per page.
- catalog abstract "The phenomenal increases in computer system performance in recent years have been accompanied by a commensurate increase in power and energy dissipation. The latter has directly resulted in demand for expensive packaging and cooling technology, an increase in product cost, and a decrease in product reliability in all segments of the computing market. Moreover, the higher power/energy dissipation has signi cantly reduced battery life in portable systems. While - stem designers have traditionally relied on circuit-level techniques to reduce - wer/energy, there is a growing need to address power/energy dissipation at all levels of the computer system. We are pleased to welcome you to the proceedings of the Power-Aware C- puter Systems (PACS 2000) workshop. PACS 2000 was the rst workshop in its series and its aim was to bring together experts from academia and industry to address power-/energy-awareness at all levels of computer systems. In these p- ceedings, we bring you several excellent research contributions spanning a wide spectrum of areas in power-aware systems, from application all the way to c- pilers and microarchitecture, and to power/performance estimating models and tools. We have grouped the contributions into the following speci c categories: (1) power-aware microarchitectural/circuit techniques, (2) application/compiler power optimizations, (3) exploiting opportunity for power optimization in - struction scheduling and cache memories, and (4) power/performance models and tools.".
- catalog contributor b12452494.
- catalog contributor b12452495.
- catalog contributor b12452496.
- catalog created "2001.".
- catalog date "2001".
- catalog date "2001.".
- catalog dateCopyrighted "2001.".
- catalog description "Includes bibliographical references and index.".
- catalog description "System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors / F. Gruian -- Ramp Up/Down Functional Unit to Reduce Step Power / Z. Tang, N. Chang and S. Lin / [and others] -- An Adaptive Issue Queue for Reduced Power at High Performance / A. Buyuktosunoglu, S. Schuster and D. Brooks / [et al.] -- Dynamic Memory Oriented Transformation in the MPEG4 IM1-Player on a Low Power Platform / P. Marchal, C. Wong and A. Prayati / [et al.] -- Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering / J. Euh and W. Burleson -- Compiler-Directed Dynamic Frequency and Voltage Scheduling / C.-H. Hsu, U. Kremer and M. Hsiao.".
- catalog description "The phenomenal increases in computer system performance in recent years have been accompanied by a commensurate increase in power and energy dissipation. The latter has directly resulted in demand for expensive packaging and cooling technology, an increase in product cost, and a decrease in product reliability in all segments of the computing market. Moreover, the higher power/energy dissipation has signi cantly reduced battery life in portable systems. While - stem designers have traditionally relied on circuit-level techniques to reduce - wer/energy, there is a growing need to address power/energy dissipation at all levels of the computer system. We are pleased to welcome you to the proceedings of the Power-Aware C- puter Systems (PACS 2000) workshop. PACS 2000 was the rst workshop in its series and its aim was to bring together experts from academia and industry to address power-/energy-awareness at all levels of computer systems. In these p- ceedings, we bring you several excellent research contributions spanning a wide spectrum of areas in power-aware systems, from application all the way to c- pilers and microarchitecture, and to power/performance estimating models and tools. We have grouped the contributions into the following speci c categories: (1) power-aware microarchitectural/circuit techniques, (2) application/compiler power optimizations, (3) exploiting opportunity for power optimization in - struction scheduling and cache memories, and (4) power/performance models and tools.".
- catalog extent "x, 151 p. :".
- catalog identifier "354042329X (pbk. : alk. paper)".
- catalog isPartOf "Lecture notes in computer science, 0302-9743 ; 2008".
- catalog issued "2001".
- catalog issued "2001.".
- catalog language "eng".
- catalog publisher "Berlin ; New York : Springer,".
- catalog subject "621.39/16 21".
- catalog subject "Computer hardware.".
- catalog subject "Computer network architectures.".
- catalog subject "Computer science.".
- catalog subject "Electric batteries Congresses.".
- catalog subject "Energy conservation Congresses.".
- catalog subject "Logic design.".
- catalog subject "Portable computers Power supply Congresses.".
- catalog subject "TK7895.P68 I58 2000".
- catalog tableOfContents "System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors / F. Gruian -- Ramp Up/Down Functional Unit to Reduce Step Power / Z. Tang, N. Chang and S. Lin / [and others] -- An Adaptive Issue Queue for Reduced Power at High Performance / A. Buyuktosunoglu, S. Schuster and D. Brooks / [et al.] -- Dynamic Memory Oriented Transformation in the MPEG4 IM1-Player on a Low Power Platform / P. Marchal, C. Wong and A. Prayati / [et al.] -- Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering / J. Euh and W. Burleson -- Compiler-Directed Dynamic Frequency and Voltage Scheduling / C.-H. Hsu, U. Kremer and M. Hsiao.".
- catalog title "Power-aware computer systems : First International Workshop, PACS 2000, Cambridge, MA, USA, November 12, 2000 : revised papers / B. Falsafi, T.N. Vijaykumar, (Eds.)".
- catalog type "Cambridge (Mass., 2000) swd".
- catalog type "Conference proceedings. fast".
- catalog type "text".