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- 2009034771 contributor B11434727.
- 2009034771 created "c2010.".
- 2009034771 date "2010".
- 2009034771 date "c2010.".
- 2009034771 dateCopyrighted "c2010.".
- 2009034771 description "Includes bibliographical references and index.".
- 2009034771 extent "xxix, 367 p. :".
- 2009034771 identifier "0137045794 (hardback : alk. paper)".
- 2009034771 identifier "9780137045792".
- 2009034771 issued "2010".
- 2009034771 issued "c2010.".
- 2009034771 language "eng".
- 2009034771 publisher "Upper Saddle River, NJ : Addison-Wesley,".
- 2009034771 subject "621.390285/53 22".
- 2009034771 subject "Computer simulation.".
- 2009034771 subject "Electronic digital computers Design and construction.".
- 2009034771 subject "TK7885.7 .Z86 2010".
- 2009034771 subject "Verilog (Computer hardware description language)".
- 2009034771 title "Digital system design with SystemVerilog / Mark Zwolinski.".
- 2009034771 type "text".