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- 2012935652 contributor B12699151.
- 2012935652 created "c2012.".
- 2012935652 date "2012".
- 2012935652 date "c2012.".
- 2012935652 dateCopyrighted "c2012.".
- 2012935652 description "Includes bibliographical references (p. 251-252) and index.".
- 2012935652 description "Pt. 1. Combinational Circuits -- Logic Variables and Events -- Switching Devices -- Elementary Logic Functions -- Normal Forms -- Karnaugh Maps -- Adjacency and Consensus -- Algebraic Minimisation -- Design by Composition -- pt. 2. Latches -- Basic Theory of Latches -- Designing Feedback Latches -- Elementary Latches -- Latch Composition -- pt.3. Asynchronous Circuits -- Word-Recognition Tree -- Huffman's Flow Table -- State-Encoding by Iterative Catenation -- Circuit Analysis -- State Reduction -- Verifying a Logic Design.".
- 2012935652 extent "xiv, 258 p. :".
- 2012935652 identifier "3642276563 (alk. paper)".
- 2012935652 identifier "9783642276569 (alk. paper)".
- 2012935652 identifier "9783642276576 (e-ISBN)".
- 2012935652 issued "2012".
- 2012935652 issued "c2012.".
- 2012935652 language "eng".
- 2012935652 publisher "Heidelberg ; New York : Springer,".
- 2012935652 subject "621.39/5 23".
- 2012935652 subject "Circuits and Systems.".
- 2012935652 subject "Electronic Circuits and Devices.".
- 2012935652 subject "Engineering.".
- 2012935652 subject "Information and Communication, Circuits.".
- 2012935652 subject "Logic circuits Computer-aided design.".
- 2012935652 subject "Logic circuits Design and construction.".
- 2012935652 subject "Logic design.".
- 2012935652 subject "Mathematics.".
- 2012935652 subject "Systems engineering.".
- 2012935652 subject "TK7868.L6 V56 2012".
- 2012935652 tableOfContents "Pt. 1. Combinational Circuits -- Logic Variables and Events -- Switching Devices -- Elementary Logic Functions -- Normal Forms -- Karnaugh Maps -- Adjacency and Consensus -- Algebraic Minimisation -- Design by Composition -- pt. 2. Latches -- Basic Theory of Latches -- Designing Feedback Latches -- Elementary Latches -- Latch Composition -- pt.3. Asynchronous Circuits -- Word-Recognition Tree -- Huffman's Flow Table -- State-Encoding by Iterative Catenation -- Circuit Analysis -- State Reduction -- Verifying a Logic Design.".
- 2012935652 title "Logic circuit design : selected methods / Shimon P. Vingron.".
- 2012935652 type "text".