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- 89002952 contributor B5843073.
- 89002952 contributor B5843074.
- 89002952 created "1989.".
- 89002952 date "1989".
- 89002952 date "1989.".
- 89002952 dateCopyrighted "1989.".
- 89002952 description "Includes bibliographical references.".
- 89002952 extent "ix, 328 p. :".
- 89002952 identifier "0444873414 (U.S.)".
- 89002952 issued "1989".
- 89002952 issued "1989.".
- 89002952 language "eng".
- 89002952 publisher "Amsterdam ; New York : North-Holland ; New York, N.Y., U.S.A. : Sole distributors for the U.S.A. and Canada, Elsevier Science Pub. Co.,".
- 89002952 subject "621.381/73 19".
- 89002952 subject "Integrated circuits Very large scale integration Design and construction Congresses.".
- 89002952 subject "Silicon compilers Design and construction Congresses.".
- 89002952 subject "TK7874 .I5943 1988".
- 89002952 title "Logic and architecture synthesis for silicon compilers : proceedings of the International Workshop on Logic and Architecture Synthesis for Silicon Compilers held in Grenoble, France, 25-27 May, 1988 / edited by Gabrièle Saucier, Paul Michael McLellan.".
- 89002952 type "text".