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- 90028307%2F%2Fr96 contributor B6114048.
- 90028307%2F%2Fr96 contributor B6114049.
- 90028307%2F%2Fr96 created "1991.".
- 90028307%2F%2Fr96 date "1991".
- 90028307%2F%2Fr96 date "1991.".
- 90028307%2F%2Fr96 dateCopyrighted "1991.".
- 90028307%2F%2Fr96 description "Includes bibliographical references.".
- 90028307%2F%2Fr96 extent "xii, 337 p. :".
- 90028307%2F%2Fr96 identifier "0444890238".
- 90028307%2F%2Fr96 issued "1991".
- 90028307%2F%2Fr96 issued "1991.".
- 90028307%2F%2Fr96 language "eng".
- 90028307%2F%2Fr96 publisher "Amsterdam ; New York : North-Holland ; New York, N.Y., U.S.A. : Distributors for the U.S. and Canada, Elsevier Science Pub. Co.,".
- 90028307%2F%2Fr96 subject "621.39/5 20".
- 90028307%2F%2Fr96 subject "Integrated circuits Very large scale integration Design and construction Congresses.".
- 90028307%2F%2Fr96 subject "Silicon compilers Design and construction Congresses.".
- 90028307%2F%2Fr96 subject "TK7874 .I3282 1990".
- 90028307%2F%2Fr96 title "Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 Workshop on Logic and Architecture Synthesis, Paris, France, 30 May-1 June 1990 / edited by Petra Michel, Gabrielle Saucier.".
- 90028307%2F%2Fr96 type "text".