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- 97202128 alternative "MTDT'97".
- 97202128 alternative "Memory Technology, Design and Testing".
- 97202128 alternative "Records of the IEEE International Workshop on Memory Technology, Design and Testing".
- 97202128 contributor B8212820.
- 97202128 contributor B8212821.
- 97202128 contributor B8212822.
- 97202128 created "c1997.".
- 97202128 date "1997".
- 97202128 date "c1997.".
- 97202128 dateCopyrighted "c1997.".
- 97202128 description " Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.].".
- 97202128 description "Includes bibliographical references and index.".
- 97202128 extent "ix, 103 p. :".
- 97202128 identifier "0818680997 (paper)".
- 97202128 identifier "0818681004 (case)".
- 97202128 identifier "0818681012 (microfiche)".
- 97202128 issued "1997".
- 97202128 issued "c1997.".
- 97202128 language "eng".
- 97202128 publisher "Los Alamitos, Calif. : IEEE Computer Society Press,".
- 97202128 subject "621.39/732 21".
- 97202128 subject "Random access memory Congresses.".
- 97202128 subject "Semiconductor storage devices Testing Congresses.".
- 97202128 subject "TK7895.M4 I334 1997".
- 97202128 tableOfContents " Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.].".
- 97202128 title "MTDT'97".
- 97202128 title "Memory Technology, Design and Testing".
- 97202128 title "Proceedings : International Workshop on Memory Technology, Design, and Testing / edited by F. Lombardi, R. Rajsuman, and T. Wik ; sponsored by IEEE Computer Society, IEEE Computer Society Technical Committee on Test Technology, IEEE Computer Society Technical Committee on VLSI ; in cooperation with IEEE Solid State Circuits Council.".
- 97202128 title "Records of the IEEE International Workshop on Memory Technology, Design and Testing".
- 97202128 type "text".